Binatone SI-4060 Specifications

Rev 0.1 12/12 Copyright © 2012 by Silicon Laboratories Si4063/60Si4063/60HIGH-PERFORMANCE, LOW-CURRENT TRANSMITTERFeaturesApplicationsDescriptionSilic

Si4063/6010 Rev 0.11.1. Definition of Test ConditionsProduction Test Conditions:TA=+25°C.VDD=+3.3VDC.TX output power measured at 915 MHz.Exte

Si4063/60Rev 0.1 112. Functional DescriptionThe Si406x devices are high-performance, low-current, wireless ISM transmitters that cover the sub-GHz ba

Si4063/6012 Rev 0.13. Controller Interface3.1. Serial Peripheral Interface (SPI)The Si406x communicates with the host MCU over a standard 4-wire ser

Si4063/60Rev 0.1 13Figure 3. SPI Read Command—Check CTS ValueFigure 4. SPI Read Command—Clock Out Read DataSend CommandRead CTSRetrieve ResponseCTS Va

Si4063/6014 Rev 0.13.2. Fast Response RegistersThe fast response registers are registers that can be read immediately without the requirement to moni

Si4063/60Rev 0.1 15Figure 6 shows the POR timing and voltage requirements. The power consumption (battery life) depends on theduty cycle of the applic

Si4063/6016 Rev 0.13.3.2. Shutdown StateThe shutdown state is the lowest current consumption state of the device with nominally less than 30 nA of cur

Si4063/60Rev 0.1 173. Enable PLL.4. Calibrate VCO/PLL.5. Wait until PLL settles to required transmit frequency (controlled by an internal timer).6.

Si4063/6018 Rev 0.13.4. Application Programming Interface (API)An application programming interface (API), which the host MCU will communicate with,

Si4063/60Rev 0.1 193.6. GPIOFour general purpose IO pins are available to utilize in the application. The GPIO are configured by theGPIO_PIN_CFG comm

Si4063/602 Rev 0.1Functional Block DiagramProduct Freq. Range Max Output PowerTX Current Narrowband OperationSi4063 Major bands142–1050 MHz+20dBm 169M

Si4063/6020 Rev 0.14. Modulation and Hardware Configuration OptionsThe Si406x supports different modulation options and can be used in various config

Si4063/60Rev 0.1 215. Internal Functional BlocksThe following sections provide an overview to the key internal blocks and features.5.1. SynthesizerA

Si4063/6022 Rev 0.15.1.1.1. EZ Frequency ProgrammingIn applications that utilize multiple frequencies or channels, it may not be desirable to write f

Si4063/60Rev 0.1 23The ramping profile is close to a linear ramping profile with smoothed out corner when approaching Vhi and Vlo.The TXRAMP pin can s

Si4063/6024 Rev 0.1Figure 9. +20 dBm TX Power vs. VDDFigure 10. +20 dBm TX Power vs. Temp10 12 14 16 18 20 22 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

Si4063/60Rev 0.1 255.3. Crystal Oscillator The Si406x includes an integrated crystal oscillator with a fast start-up time of less than 250 µs. The de

Si4063/6026 Rev 0.16. Data Handling and Packet Handler6.1. TX FIFOsOne 64-byte FIFO is integrated into the chip for TX as shown in Figure 12. Writin

Si4063/60Rev 0.1 277. Auxiliary Blocks7.1. Wake-up Timer and 32 kHz Clock SourceThe chip contains an integrated wake-up timer that can be used to pe

Si4063/6028 Rev 0.1Table 12. WUT Specific Commands and PropertiesAPI Properties Description Requirements/NotesGLOBAL_WUT_CONFIG GLOBAL WUT configurati

Si4063/60Rev 0.1 297.2. Low Duty Cycle ModeThe low duty cycle (LDC) mode is implemented to automatically wake-up the transmitter to send a packet. It

Si4063/60Rev 0.1 3TABLE OF CONTENTSSection Page1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Si4063/6030 Rev 0.17.3. Temperature, Battery Voltage, and Auxiliary ADCThe Si406x family contains an integrated auxiliary ADC for measuring internal

Si4063/60Rev 0.1 313 = Measure voltage of GPIO3 UDTIME[7:4] - ADC conversion Time = SYS_CLK / 12 / 2^(UDTIME + 1). Defaults to 0xC if ADC_CFG is 0.

Si4063/6032 Rev 0.18. Pin Descriptions: Si4063/60 Pin Pin Name I/0 Description1SDN IShutdown Input Pin. 0–VDD V digital input. SDN should be = 0 in a

Si4063/60Rev 0.1 3312 SCLK ISerial Clock Input. 0–VDD V digital input. This pin provides the serial data clock function for the 4-line serial data bus

Si4063/6034 Rev 0.19. Ordering InformationPart Number1,2Description Package Type Operating TemperatureSi4063-Bxx-FMISM EZRadioPRO TransmitterQFN-20Pb

Si4063/60Rev 0.1 3510. Package Outline: Si4063/60Figure 15 illustrates the package details for the Si406x. Table 14 lists the values for the dimensio

Si4063/6036 Rev 0.1Table 14. Package DimensionsDimensionMin Nom MaxA 0.80 0.85 0.90A1 0.00 0.02 0.05A3 0.20 REFb 0.18 0.25 0.30D 4.00 BSCD2 2.45 2.60

Si4063/60Rev 0.1 3711. PCB Land Pattern: Si4063/60Figure 16 illustrates the PCB land pattern details for the Si406x. Table 15 lists the values for th

Si4063/6038 Rev 0.1Table 15. PCB Land Pattern DimensionsSymbol MillimetersMin MaxC1 3.90 4.00C2 3.90 4.00E 0.50 REFX1 0.20 0.30X2 2.55 2.65Y1 0.65 0.7

Si4063/60Rev 0.1 3912. Top Marking12.1. Si4063/60 Top Marking12.2. Top Marking ExplanationMark MethodYAG LaserLine 1 MarkingPart Number40631B = Si4

Si4063/604 Rev 0.11. Electrical SpecificationsTable 1. DC Characteristics1Parameter Symbol Test Condition Min Typ Max UnitSupply Voltage RangeVDD1.8

Si4063/6040 Rev 0.1CONTACT INFORMATIONSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Tel: 1+(512) 416-8500Fax: 1+(512) 416-9669Toll Fre

Si4063/60Rev 0.1 5Table 2. Synthesizer AC Electrical Characteristics1Parameter Symbol Test Condition Min Typ Max UnitSynthesizer FrequencyRange (Si406

Si4063/606 Rev 0.1Table 3. Transmitter AC Electrical Characteristics1Parameter Symbol Test Condition Min Typ Max UnitTX FrequencyRange (Si4063/60)FTX8

Si4063/60Rev 0.1 7Table 4. Auxiliary Block Specifications1Parameter Symbol Test Condition Min Typ Max UnitTemperature Sensor Sensitivity2TSS— 4.5 — AD

Si4063/608 Rev 0.1Table 5. Digital IO Specifications (GPIO_x, SCLK, SDO, SDI, nSEL, nIRQ, SDN)1Parameter Symbol Test Condition Min Typ Max UnitRise Ti

Si4063/60Rev 0.1 9Table 6. Absolute Maximum RatingsParameterValue UnitVDD to GND–0.3, +3.6 VInstantaneous VRF-peak to GND on TX Output Pin–0.3, +8.0 V